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Recent Field Programmable Gate Array (fpga) Inquiries

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Digital Signal Processor (dsp)

Hello sir, i have a ti dsp tms320f2812. I am programming this for artificial neural network implementation. I am giving the input signal using adc channels and after processing output will be taken out form the dac channels. Can you please help me. My aim is to implement back propagation algorithm. Thanks in advance.

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    Andrei |Software Embedded Firmware Electronics E

    For what parts do you need help?...

    4 Hours Later
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    Harry |COO, Consultant

    I have worked with the TI DSPs and have implemented back *****rithms for neural networks...

    4.2 Hours Later
+5 Other Responses
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Laser Attenuator Optics

We have a pld device and we want to turn it into a heat load machine by purchasing an attenuator. I am having trouble figuring out the specs of the attenuation required. After a few calculations : our laser (248nm - 500mj in 20ns of area 3.9 cm2) we want it to achieve a power per area density of that found in the tokamak (50mw/m2). So the ratio of attenuation defined by the ratio of power densities of pld to tokamak is 1280. Where do we go from here? How do we choose a fixed attenuator? What sort of specs should it have to fit our needs? Thank you! ateam

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    Erik |Senior Process TD Engineer

    I have a PhD in laser spectroscopy and 7 years of experience in laser optics. I am happy to help wit...

    1.8 Hours Later
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    Scott |Corporate Scientist

    So you need to reduce power by a little over 30 dB. I don't understand what the issue is here, just ...

    1.8 Hours Later
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    Kenneth R. |Electro-Physics Scientist/Engineer

    I've been working with lasers, optics, and the like for about 30 years, so have seen pretty much eve...

    2 Hours Later
+5 Other Responses
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Fpga

Fpga design ddr3 interface high-speed interfaces altera stratix-v rtl design implementation

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    Kevin |FPGA Design Engineer

    Available and interested please get in touch with me...

    3 Minutes Later
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    Richard |

    Please explain exactly what you need done. I know a company who would provide this kind service on a...

    14 Minutes Later
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    Thomas |Consultant

    I have extensive experience designing digital logic in FPGAs using VHDL and Verilog. I have also wo...

    10.2 Hours Later
+6 Other Responses
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Electronic Components

We are seeking information on the historical price trends (2 years) for various electronic components (memory (dram, sram, nand), analog ics, processors, programmable logic, discrete semiconductors, passive components, electromechanical devices, etc.,)

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    Tarun |Partner

    Hi, I can assist you with historical price *****se let me know in case youth have any s...

    3.5 Hours Later
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    Kaushik |Scientific Officer

    I have 16 years of experience in market research...I can provide you price trends for last 2 years f...

    17.4 Hours Later
+3 Other Responses
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Blackfin Dsp

Looking for consulting to accelerate the porting of software to the blackfin family. C code residing on a microcontroller product is the base code that needs to function on the blackfin. Expertise in the blackfin development environment to provide direction on optimum develop paths is needed.

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    Mikhail |Principal Consulting Engineer

    Hello, I have extensive experience with various members of Blackfin family. Please let me know how ...

    12 Minutes Later
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    Ken |Director of Engineering

    Hello gwiese, Diligent Minds LLC is ***** Las Vegas, NV, USA. We have extensive experience in...

    27 Minutes Later
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    Chakravarthy |President & CEO

    Hi, May be I can help you if your project is interesting and worth the time. I have vast experience...

    2.6 Hours Later
+7 Other Responses
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8051 Programming

I don't know about programming in 8051 much so need help in programming. 8051 expert developer and programmer

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    Eric |Consultant

    Unless you are forced to use the 8051, I would strongly suggest using any of the ARM Cortex micros f...

    4.9 Hours Later
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    C |President

    I am very familiar with 8051 developing and programming. I was taught about embedded systems on the ...

    5.1 Hours Later
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    Pragnesh |Senior Engineer

    Long experience with 8051 and ATMEL 89C***** (Same architecture with flash). Assembly as well as Kei...

    5.4 Hours Later
+6 Other Responses
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Fpga

We have a problem of debugging a piece of program running on a custom made xilinx virtex 6 fpga board. This problem related to access external ddr3 sodimm sdram. We need an xilinx fpga export to help solve this problem. Problem details as follows: memory interface problems test setup: a program running on a virtex 6 fpga writes eight sequential data patterns (0 to 511) into different address ranges of an external ddr3 sodimm (“write cycle”). The data pattern and addresses are designed in such way that the lower 9 bits of the data and address match. After all data is written, the data is read back (“read cycle”) in a different order and the least 9 bits of address and data are compared. The core to interface with the sodimm was generated with xilinx mig-tool v3.92. Test results: using chipscope the data and address written into and received from the memory interface is monitored. Write cycle: the data and address written into the memory interface are correct every time. The data and address match from the beginning to the end of each write cycle. Read cycle: at the beginning of the first read cycle the data read from the memory interface is correct. After about 1920 consecutive read cycles, the expected data is visible on the data bus but indicated as ‘invalid’ but the memory interface controller. The following data is incorrect – the 9 common bits in address and data do not match anymore. Even after new write cycle has written correct data again, the data read from the memory is incorrect.

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    Kevin |FPGA Design Engineer

    would love to help. not sure what the process is through zintro - if there's a fee, will ***** ...

    5.3 Hours Later
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    Guillermo |Director

    I manage a small team with a lot of experience in FPGA design, ***** debug. We have worke...

    6.4 Hours Later
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    Farhad |Lead HW Design Engineer ASIC/FPGA

    Solving DDR access problems is aa time consuming and difficult task. We have solved many such proble...

    10.2 Hours Later
+14 Other Responses
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Fpga

Project description: fpga control system and high-speed rasterizer seeking a senior engineer to join a small team working on an fpga-based image-generating system. Main responsibilities are assembling a xilinx virtex-5 fpga design, including microblaze controller with standard ethernet, memory, and other interface ip modules, as well as creating custom fpga modules for high-speed parallel monochrome rasterization and synchronization to position sensor signals. Project requires use of xilinx edk and related tools, operated under makefile control in linux to automate build from checked-in sources.

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    Kevin |FPGA Design Engineer

    I am an experienced FPGA design engineer with over 20 yrs experience - let's talk. I can help you...

    1.2 Hours Later
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    Ashutosh |Principal Consultant

    Hi, Thanks for the request. To say that we have one person who can do cutting edge VLSI and Linux b...

    3.2 Hours Later
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    Barun Kumar |Sr Manager - Sales and Marketing

    Sir, Thanks a lot for let me know about the requirement. It will be really helpful if I can know t...

    4.9 Hours Later
+13 Other Responses
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Integrated Circuit In Smartphone

We are a prominent nyc-based expert network firm and an authorized zintro partner working with a ny area hedge fund. Our client has an immediate interest in conducting phone consults with individuals knowledgeable on analog, mixed-signal, and audio dsp integrated circuits used in smartphones/tablets. Candidates must have experience working for a smartphone/tablet manufacturer in the past 2 years, and ideally would be/have been in a role where they procured from/analyzed vendors such as cirrus logic, wolfson microelectronics, silicon labs, intersil, analog devices, etc.

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    Arup |Director Wireless Platform Solutions

    Hello I am a 30+ year Wireless and phone industry expert. Would be happy to consult...

    4.9 Hours Later
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    Stephen |CTO SoC and System Architect

    In the past 3 years I have been involved in the development of ASICs /SOCs with significant analog ...

    13.4 Hours Later
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    Emilijan |General Manager

    You do not need any expert for that purpose! Just follow the products ***** the *****...

    13.6 Hours Later
+6 Other Responses
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Gstreamer

The project concerns a camera from basler (http://www.*******.Com/products/pilot.Html?Model=143) which is being used in a task for industrial computer vision. The camera is connected to a linux box (currently running ubuntu 12.04). The task we need your help with is to make a server daemon which is be able to take the input images from this camera (this is straightforward - an api is provided) which are served as char pointers, and stream these to a web front end using either webm or flv and show it in the browser real time using a client such as video.Js or similar.

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    Morteza |Software Developer

    this is a typical web service problem, that I can do in c++ or java. On the client side, you can hav...

    5.3 Hours Later
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    Mayank |Head Division

    Hi, I need full description of project before given any time commitment. you can mail me: mayankchaw...

    9.1 Hours Later
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    Mike |Principal

    You need to use a gstreamer plugin, aravis looks like the one. The char* API you seem to be suggesti...

    7.4 Days Later
+10 Other Responses
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Peripheral Component Interconnect Express

Pcie driver to connect ti dsp and altera fpga

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    Richard |

    Hi, I'm afraid S/W is not my area of expertise. Regards, Richard Rooney. ...

    1.2 Hours Later
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    Dimitry |Engineering Director / Consultant

    Hello, we can help you with this project. Our company specialized in HW-SW co-development including ...

    4.9 Hours Later
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    Farhad |Lead HW Design Engineer ASIC/FPGA

    Hi, I am more than happy to answer to any question you have regarding this project. I would like to ...

    1 Day Later
+3 Other Responses
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Fpga

Using fpga xilinx create modulation communication codes, and ethernet dhcp protocol to develop. Please contact me through zintro for details. Regards, charles

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    Ashutosh |Principal Consultant

    Can you provide more details on the project on hand and what is pending? Regards, Ashutosh...

    12 Minutes Later
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    Joseph |Consultant

    Hello Charles, I would be glad to assist you with your project. Please provide more details with re...

    2.5 Hours Later
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    Brian |Sr. Design and Verification Engineer

    Truly expert at this. Brian...

    2.8 Hours Later
+11 Other Responses
See More Inquiries

A field-programmable gate array (FPGA) is a semiconductor device that can be configured by the customer or designer after manufacturing—hence the name "field-programmable". To program an FPGA one must specify how they want the chip to work with a logic circuit diagram or a source code in a hardware description language (HDL). FPGAs can be used to implement any logical function that an application-specific integrated circuit (ASIC) could perform, but the ability to update the functionality after shipping offers advantages for many applications. FPGAs contain programmable logic components called "logic blocks", and a hierarchy of reconfigurable interconnects that allow the blocks to be "wired together"—somewhat like a one-chip programmable breadboard. Logic blocks can be configured to perform complex combinational functions, or merely simple logic gates like AND and XOR. In most FPGAs, the logic blocks also include memory elements, which may be simple flip-flops or more complete blocks of memory. For any given semiconductor process, FPGAs are usually slower than their fixed ASIC counterparts. They also draw more power, and generally achieve less functionality using a given amount of circuit complexity. But their advantages include a shorter time to market, ability to re-program in the field to fix bugs, and lower non-recurring engineering costs. Vendors can also take a middle road by developing their hardware on ordinary FPGAs, but manufacture their final version so it can no longer be modified after the design has been committed.

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