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Recent Field Programmable Gate Array Fpga Inquiries

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Fpga

Fpga design ddr3 interface high-speed interfaces altera stratix-v rtl design implementation

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    Kevin |FPGA Design Engineer

    Available and interested please get in touch with me...

    3 Minutes Later
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    Richard |

    Please explain exactly what you need done. I know a company who would provide this kind service on a...

    14 Minutes Later
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    Thomas |Consultant

    I have extensive experience designing digital logic in FPGAs using VHDL and Verilog. I have also wo...

    10.2 Hours Later
+6 Other Responses
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Fpga

Using fpga xilinx create modulation communication codes, and ethernet dhcp protocol to develop. Please contact me through zintro for details. Regards, charles

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    Ashutosh |Principal Consultant

    Can you provide more details on the project on hand and what is pending? Regards, Ashutosh...

    12 Minutes Later
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    Joseph |Consultant

    Hello Charles, I would be glad to assist you with your project. Please provide more details with re...

    2.5 Hours Later
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    Brian |Sr. Design and Verification Engineer

    Truly expert at this. Brian...

    2.8 Hours Later
+11 Other Responses
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Microwave Electronics

New microwave electronics product that has digital electronics, fpgas, magnetrons. We need a reliability model constructed using the telcordia reliability software package. We are located in the nashua nh area, and would like to work with someone local if possible.

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    Jonathan |New Product Development Manager

    Dear Telc47C7G4, I have extensive knowledge of magnetrons and I live in central NH. Although it was...

    19.3 Hours Later
+2 Other Responses
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Programmable Logic Controllers (plc)

Plc expert in food industry

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    Willy |Electrical / Instrumentation / Automatio

    I have already experience as PLC programmer and I worked in some food industries....

    42 Minutes Later
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    Oren |VP Business Development, Sales and Marke

    I have reach experiance as a process control expert. The reason I am better than others is that I am...

    21.7 Hours Later
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    Arun |C O O

    Our one verticals experienced only in food processing PLC/Sacda/process control/total industrial aut...

    1.2 Days Later
+5 Other Responses
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Fpga

We have a problem of debugging a piece of program running on a custom made xilinx virtex 6 fpga board. This problem related to access external ddr3 sodimm sdram. We need an xilinx fpga export to help solve this problem. Problem details as follows: memory interface problems test setup: a program running on a virtex 6 fpga writes eight sequential data patterns (0 to 511) into different address ranges of an external ddr3 sodimm (“write cycle”). The data pattern and addresses are designed in such way that the lower 9 bits of the data and address match. After all data is written, the data is read back (“read cycle”) in a different order and the least 9 bits of address and data are compared. The core to interface with the sodimm was generated with xilinx mig-tool v3.92. Test results: using chipscope the data and address written into and received from the memory interface is monitored. Write cycle: the data and address written into the memory interface are correct every time. The data and address match from the beginning to the end of each write cycle. Read cycle: at the beginning of the first read cycle the data read from the memory interface is correct. After about 1920 consecutive read cycles, the expected data is visible on the data bus but indicated as ‘invalid’ but the memory interface controller. The following data is incorrect – the 9 common bits in address and data do not match anymore. Even after new write cycle has written correct data again, the data read from the memory is incorrect.

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    Kevin |FPGA Design Engineer

    would love to help. not sure what the process is through zintro - if there's a fee, will ***** ...

    5.3 Hours Later
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    Guillermo |Director

    I manage a small team with a lot of experience in FPGA design, ***** debug. We have worke...

    6.4 Hours Later
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    Farhad |Lead HW Design Engineer ASIC/FPGA

    Solving DDR access problems is aa time consuming and difficult task. We have solved many such proble...

    10.2 Hours Later
+14 Other Responses
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Afm Conrtol Using Labview Fpga

Hi, i am naveed, researcher from south korea. I am working on afm control using labview fpga. I have written a labview code for the generation of point by point triangular wave pattern for my fast axis scan (file attached). Now the problem is that when i saw the commercially available controllers, the wave pattern is a bit different in a sense that the steps are not visible even at very low pixel size of 32. Now my purpose is to generate triangular wave form, point by point in which i should be able to enter my desired number of point i.E pixels. Please guide me in this regard or if you have a vi fulfilling my needs kindly send that to me if possible. Thanks. Note: can send the code if needed.

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    Michael |CTO

    I think I know what is the problem, and can help you with it. I have been working with LabView for 1...

    8.5 Hours Later
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    Kjartan |CEO, Chief Designer R&D

    Hi Can you send me copy of your code Kjartan - www kps dot is Shanghai...

    12.6 Hours Later
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    Arev |Zintro Expert

    Hello Naveed, I'm a systems engineer with 4 years experience in development of LabVIEW *****...

    15 Hours Later
+4 Other Responses
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Pressure Sensor Design And Testing

Looking for some one to design and test a small pressure sensor pcb, that contains the following: 1) igloo nano fpga http://www.Microsemi.Com/products/fpga-soc/fpga/igloo-nano criteria: low power, lowest cost, pin migratablility, 1k les to 3k les, non-volatile 2) 5v to 3.3,1.2 v regulators 3) connectors can bus, power in (5v), power out (5v) 4) mems pressure sensors criteria: 4 numbers, highest sensitivity, low cost, i2c or other interface to fpga 5) lever driver circuit shall drive a current of 1a at 5v 6) can driver circuit shall drive a can bus giridhar

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    Pragnesh |Senior Engineer

    Why FPGA? It is usually costly affair then small microcontroller that supports CAN bus....

    5.5 Hours Later
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    Alfredo |Consultant

    No problem in principle, it would help to have a short *****t your project and context. ...

    5.5 Hours Later
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    Al |Zintro Expert

    Giridhar - we'd be interested in discussing this with you. We are experts in FPGA development (a sh...

    5.5 Hours Later
+10 Other Responses
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Fpga

Project description: fpga control system and high-speed rasterizer seeking a senior engineer to join a small team working on an fpga-based image-generating system. Main responsibilities are assembling a xilinx virtex-5 fpga design, including microblaze controller with standard ethernet, memory, and other interface ip modules, as well as creating custom fpga modules for high-speed parallel monochrome rasterization and synchronization to position sensor signals. Project requires use of xilinx edk and related tools, operated under makefile control in linux to automate build from checked-in sources.

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    Kevin |FPGA Design Engineer

    I am an experienced FPGA design engineer with over 20 yrs experience - let's talk. I can help you...

    1.2 Hours Later
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    Ashutosh |Principal Consultant

    Hi, Thanks for the request. To say that we have one person who can do cutting edge VLSI and Linux b...

    3.2 Hours Later
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    Barun Kumar |Sr Manager - Sales and Marketing

    Sir, Thanks a lot for let me know about the requirement. It will be really helpful if I can know t...

    4.9 Hours Later
+13 Other Responses
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Peripheral Component Interconnect Express

Pcie driver to connect ti dsp and altera fpga

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    Richard |

    Hi, I'm afraid S/W is not my area of expertise. Regards, Richard Rooney. ...

    1.2 Hours Later
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    Dimitry |Engineering Director / Consultant

    Hello, we can help you with this project. Our company specialized in HW-SW co-development including ...

    4.9 Hours Later
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    Farhad |Lead HW Design Engineer ASIC/FPGA

    Hi, I am more than happy to answer to any question you have regarding this project. I would like to ...

    1 Day Later
+3 Other Responses
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Avionics, 1553b, Arinc 429,afdx,ip Cores

We are looking to develop afdx. Can you provide the details of ip core and supportable fpga ? Kindly provide the ip core experts details?

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    Kevin |FPGA Design Engineer

    Interested and available to work on your project. I'm familiar with Xilinx and Altera FPGA technolo...

    35 Minutes Later
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    William |Electronics Design / Firmware Design and

    If you can provide a valid export license, My team can provide a full AFDX solution including V&V pa...

    1.3 Hours Later
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    Sunil |Program Manager

    We are familiar with 1553B, ARINC 429 and AFDX protocols. we already worked with 1553B and ARINC 429...

    1.7 Hours Later
+3 Other Responses
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